VLSI DESIGN - Set Input/Output Delays
Timing closure is one of the most critical aspects of digital circuit design. When working with hierarchical designs. This blog will introduce the concept of input/output delays and how to set them...
Timing closure is one of the most critical aspects of digital circuit design. When working with hierarchical designs. This blog will introduce the concept of input/output delays and how to set them...
This guide will walk you through the process of setting up Gitea using Docker on an Ubuntu server and making it accessible via Cloudflare Tunnel. Prerequisites A system running Ubuntu A ...
This guide will walk you through the process of installing Docker on Ubuntu. Docker is a platform that enables you to automate the deployment of applications inside lightweight containers. Prer...
AMIQ’s Design and Verification Tools (DVT) IDE is a powerful development environment for hardware engineers working with HDL languages like Verilog, SystemVerilog, and VHDL. Let’s explore what DVT ...
Data quantization is a crucial technique in the field of neural networks, particularly when it comes to deploying models on hardware with limited computational resources. In this blog post, we’ll e...
Cadence Innovus is a powerful tool for physical design of integrated circuits. In this post, we will see some useful commands for wire editing in Innovus. Below commands are verified on Innovus 22...
🖥️ Tmux Cheatsheet Table of Contents Sessions Windows Panes Copy Mode Misc Help Sessions Description Shell Command Tmux Command Shortcut ...
Let’s talk about something that keeps chip designers up at night: making last-minute changes to their designs. In the world of integrated circuit (IC) design, mistakes happen, and sometimes you nee...
Gem5 is a popular open-source computer architecture simulator that allows you to model and analyze the performance of hardware systems. To get started with Gem5, you’ll need to set up a working env...
In VLSI physical design, specifically during the Place and Route (PnR) phase, controlling the placement of standard cells or modules is crucial for achieving optimal performance and meeting design ...